1. Field of the Invention
This invention relates generally to Josephson latching circuits which are powered by unipolar current pulses or by clipped alternating current. More specifically, it relates to a Josephson junction latching circuit which is capable of providing true and complement outputs in response to true and complement inputs. Still more specifically, it relates to a Josephson junction latching circuit which is pulsed powered; the outputs of which cannot be changed for the duration of the applied pulsed power despite a change in the inputs within the duration of the applied pulse power. Still more specifically, it applies to a Josephson latching circuit which includes a pair of Josephson AND gates one of which provides an output and the other of which is disabled from providing an output should the inputs to the AND gates change during the same cycle of applied pulsed or alternating current power. Still more specifically, it relates to a latch circuit which incorporates a Self Gating And circuit, a flip-flop and input circuits which determine the state of the flip-flop. The Self Gating And circuit, in addition to providing unchanging true and complementary outputs during application of a pulse of given pulse duration, also provides these outputs to control circuits which apply inputs to a flip-flop which, in turn, controls the outputs of the Self Gating And circuit. The control circuits, in the form of a pair of AND gates, permit the flip-flop which triggers the Self Gating And circuit to be updated with a new input during the application of a single cycle of pulsed power without affecting the output of the Self Gating And circuit. The circuits of the present application have as a principal advantage the fact that independent clock pulses are eliminated because setting and resetting is accomplished by the applied pulsed or alternating current power. This feature eliminates possible clocking skew normally associated with independently clocked circuits. In addition, the possibility for race conditions is entirely eliminated.
2. Description of the Prior Art
With respect to the Self Gating And circuit of the present application, there is no known counterpart for the Self Gating And circuit in the prior art. This circuit, while it locks itself in the last state applied to its inputs, is unlocked not by a change of signals on its input but by the resetting action of the applied pulsed or alternating current power.
With respect to the latch which incorporates the Self Gating And circuit, there are prior art latches which provide a similar result but are more complex than the latch of the present application.
Prior art latches use separate clocks; the outputs of which are non-overlapping to provide for the enablement of AND gates which are disposed before and after a master flip-flop. In these arrangements, a first clock pulse transfers information from the master flip-flop to a slave flip-flop via a pair of AND gates setting the state of the slave which then applies outputs to a logic circuit, for example. After the first clock disappears, a second clock pulse activates another pair of AND gates thereby applying inputs from a previous logic stage to the master flip-flop. When the second clock disappears, the first clock goes on again. In this way, information is prevented from passing through the flip-flops in an uncontrolled or race condition. While the flip-flop and the input AND gates of the present latch are configured with Josephson devices, they have counterparts in other technologies and in and of themselves are not novel. The present latch, relative to known prior art latches, eliminates the slave flip-flop and the first and second clocks which are required to control the master and slave AND gate inputs. Finally, in addition to being clocked by the applied pulsed or alternating current power, the present latch cannot provide a spurious output during the interval when the pulsed power is applied because the Self Gating And is locked in that state until the next cycle of applied pulse power. In the meantime, however, the flip-flop can be updated by a changing input during the same pulsed power cycle.